| 摘要 |
PROBLEM TO BE SOLVED: To prevent lowering in a reading margin when reading data written in a memory cell. SOLUTION: A bit line BL is connected to a charge storing circuit 20 through a charge transferring circuit 12. A control circuit 16 controls charge transferability of the charge transferring circuit 12 according to a change in the voltage of the bit line BL resulting from a charge read out from a memory cell MC. A leakage controlling circuit 14 lowers the charge transferability of the charge transferring circuit 12 in a read operation temporarily before the charge is read out to the bit line BL. The leakage controlling circuit 14 prevents charge transfer between the charge storing circuit 18 and the bit line BL before data is read from the memory cell MC. The charge storing circuit 18 thus generates a read voltage sufficient for a read circuit 22 to operate with, in accordance with the logical value of the data stored in the memory cell MC. COPYRIGHT: (C)2006,JPO&NCIPI
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