发明名称 DUAL PORT SRAM CELL WITH SIX TRANSISTORS
摘要 PROBLEM TO BE SOLVED: To provide a SRAM (Static Random Access Memory) cell capable of performing reading and writing operations simultaneously without collision while reducing a size of cell, by providing a dual port SRAM cell constituted of six transistors. SOLUTION: This SRAM cell is constituted of: a writing section having one 1st transistor for inputting a data input signal from a bit line BL in response to a control signal from a word line WL; a data storage section having three transistors for storing and maintaining data inputted from the outside through the writing section; and a reading section having two transistors for outputting the data stored in the data storage section in response to a control signal from a common line C. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005293814(A) 申请公布日期 2005.10.20
申请号 JP20040194322 申请日期 2004.06.30
申请人 HYNIX SEMICONDUCTOR INC 发明人 HONG BYUNG-IL
分类号 G11C11/41;G11C8/00;G11C11/412;G11C11/4193;(IPC1-7):G11C11/41 主分类号 G11C11/41
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