发明名称 ARITHMETIC UNIT
摘要 PROBLEM TO BE SOLVED: To perform the arithmetic operations of integers and expansion bodies at high speed in a small-scale circuit. SOLUTION: An integer-adding CSA tree, which is composed of carry storage adders CSA 120-1 to 120-5 which can carry out high-speed computation with a smaller circuit, which lacks an AND gate 106 for switching carry output, compared with a full adder. Specifically, part of the integer-adding CSA tree is composed of the carry storage adders CSA 120-1 to 120-3 so that only sum output S0-S2 (i.e., the output of exclusive logical sum) may be added to each other. Consequently, the part of the integer-adding CSA tree functions as a CSA tree 120G for adding the expansion bodies. Therefore, the arithmetic operations of integers and expansion bodies can be carried out at a high speed by a small-scale circuit. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005293256(A) 申请公布日期 2005.10.20
申请号 JP20040107646 申请日期 2004.03.31
申请人 TOSHIBA CORP 发明人 MOTOYAMA MASAHIKO
分类号 G06F7/53;G06F7/50;G06F7/52;G06F7/72;(IPC1-7):G06F7/52 主分类号 G06F7/53
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