发明名称 Method and apparatus for designing layout, and computer product
摘要 A layout designing apparatus includes an input unit that receives an input of a frame having a boundary scan register, a placing unit that places an I/O macro to be connected to a signal terminal for propagating other signal than a test signal in an arbitrary I/O macro placement area of the frame input, a determining unit that determines whether a frame terminal at an arbitrary terminal position in the frame matches with at least one of a test terminal for propagating the test signal in the frame input and a signal terminal to be connected to the I/O macro placed, and a replacing unit that replaces, based on a result of determining by the determining unit, the I/O macro placed with either of a shared I/O macro and a test-only I/O macro.
申请公布号 US2005235241(A1) 申请公布日期 2005.10.20
申请号 US20040914221 申请日期 2004.08.10
申请人 FUJITSU LIMITED 发明人 OOSAKI SEIKO;ABE KOJI;WATANABE HITOSHI
分类号 G01R31/28;G01R31/3185;G06F9/45;G06F9/455;G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F9/45 主分类号 G01R31/28
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