发明名称 Signal processing system
摘要 In a processing system 100, multiple ensembles of samples of a periodic or cyclostationary signal are processed in a time aligned manner. The sampling rate of the processing system is adjusted so that an integer number of sampling intervals equals the period of the signal. A cyclic counter 103 is programmed to reset according to the integer number. Also, the cyclic counter may be initialized according to an external trigger. During operation, the cyclic counter is incremented when each sample is received. Continuous operation of the cyclic counter with the capturing of samples enables precise time alignment between ensembles of samples. Specifically, the beginning of a discrete ensemble is identified by a reset of the cyclic counter. Because each ensemble is time aligned, further processing (e.g., coherent averaging) may occur without post-processing to tie-shift each sample to achieve the time alignment. The processing system 100 comprises an A/D converter 101, cyclic counter logic means 103 and sample capture circuitry 104.
申请公布号 GB2413227(A) 申请公布日期 2005.10.19
申请号 GB20050005835 申请日期 2005.03.22
申请人 * AGILENT TECHNOLOGIES, INC. 发明人 HOWARD * HILTON
分类号 G01R13/20;G01R13/02;G01R23/02;G06F15/00;G06F19/00 主分类号 G01R13/20
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