| 摘要 |
A testing structure (1) for an electronic device is described, of the type comprising a first and second terminal (T1, T2) effective for providing impedance values of the testing structure (1), as well as an architecture (2) of distributed impedance elements (3-1, 3-2, ..., 3-N) associated with a plurality of configurations of the device to be tested having different criticality levels and connected, in parallel with each other, between the first and second terminal (T1, T2). <??>A testing method for an electronic device is also described, of the type comprising the steps of: providing a testing structure (1) comprising a first and second terminal (T1, T2) connected by means of an architecture (2) of distributed impedance elements; providing a plurality of configurations of the device to be tested having a different criticality; associating the plurality of configurations of the device to be tested with a plurality of impedance elements (3-1, 3-2, ..., 3-N) of the architecture (2) connected, in parallel with each other, to the first and second terminal (T1, T2); subjecting the configurations of the device to be tested to a testing step; measuring an impedance value (ZTOT) of the architecture (2) in correspondence with the first and second terminal (T1, T2); and calculating a highest criticality level of a configuration of the device to be tested being capable of overcoming the testing step on the basis of the measured impedance value (ZTOT). <IMAGE> |
