发明名称 Optimized system-level simulation
摘要 Integration of a system-level simulation with one or more hardware device simulations is accomplished using a mapping layer, which allows the system-level simulation to interact with the hardware device simulation at a pin level, an object level, and an abstract level. The overall simulation may operate with respect to a clock or timing device or it may operate with respect to transactions.
申请公布号 US2005229170(A1) 申请公布日期 2005.10.13
申请号 US20040820459 申请日期 2004.04.08
申请人 BELLANTONI MATTHEW;NEIFERT WILLIAM;LADD ANDREW;GRASSE MATTHEW;KOSTICK MARK 发明人 BELLANTONI MATTHEW;NEIFERT WILLIAM;LADD ANDREW;GRASSE MATTHEW;KOSTICK MARK
分类号 G06F9/44;G06F17/50;(IPC1-7):G06F9/44 主分类号 G06F9/44
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