发明名称 |
CIRCUIT LAYOUT AND STRUCTURE FOR A NON-VOLATILE MEMORY |
摘要 |
A structure of non-volatile memory contains a substrate. A plurality of bit lines are formed in the substrate along a first direction, wherein each of the bit lines also serve as a source/drain (S/D) region. A first dielectric layer is disposed over the substrate. A plurality of selection gate (SG) lines are formed over the first dielectric layer between the bit lines. A plurality of charge-storage structure layer are formed over the substrate between the bit lines and the SG lines. A second dielectric layer is formed over the SG lines and a third dielectric layer is formed over the bit lines. A plurality of word lines are formed over the substrate along a second direction, which is crossing the first direction for the bit lines. Wherein, when a selected one of the SG lines is applied a voltage, another S/D region is created in the substrate under the selected one of the SG lines.
|
申请公布号 |
US2005224865(A1) |
申请公布日期 |
2005.10.13 |
申请号 |
US20040823488 |
申请日期 |
2004.04.12 |
申请人 |
LEE CHIEN-HSING;LIN CHIN-HSI;LIOU JHYY-CHENG |
发明人 |
LEE CHIEN-HSING;LIN CHIN-HSI;LIOU JHYY-CHENG |
分类号 |
G11C11/34;G11C16/04;H01L21/8246;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|