发明名称 |
Method of designing a circuit of a semiconductor device |
摘要 |
In a method of designing a circuit layout of a semiconductor integrated circuit, a logic function of the integrated circuit is first designed. Then, a pattern layout of the integrated circuit is designed. The designed pattern layout includes a logic cell area and an open area. Next, a spare underground cell is inserted into the open area. The spare underground cell includes a functional element. A mask layout of the integrated circuit is then designed. The designed mask layout includes the logic cell and the spare underground cell.
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申请公布号 |
US2005229133(A1) |
申请公布日期 |
2005.10.13 |
申请号 |
US20040811835 |
申请日期 |
2004.03.30 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
GOTO KAZUAKI;HARADA REIKO |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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