发明名称 DIGITAL BROADCAST RECEIVER
摘要 PROBLEM TO BE SOLVED: To provide a digital broadcast receiver capable of quickly and surely setting / updating a mode and a guard interval so as to restoring to an ordinary reception operation. SOLUTION: A correlation value between an output ADO of an A/D converter and an output MO of a delay memory resulting from delaying the output ADO by a valid symbol period equivalent to the circuit setting mode is subjected to moving average processing and summation of the absolute value for the guard interval period of circuit setting. A triangle wave peak value detection circuit 504 and a peak value comparison circuit 506 detect a maximum peak value from an absolute value summating output Oabs. A level discrimination circuit 502 discriminates whether or not the absolute value summating output Oabs exceeds a threshold value. A mode / guard interval setting circuit 508 discriminates whether or not the mode / guard interval of the circuit setting is coincident with the mode / guard interval of the received signal, confirms the setting in response to that the absolute value summating output Oabs exceeds the threshold value or initializes the setting in response to that the absolute value summating output Oabs is the threshold value or below. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005286635(A) 申请公布日期 2005.10.13
申请号 JP20040096642 申请日期 2004.03.29
申请人 SANYO ELECTRIC CO LTD;SYNTHESIS CORP 发明人 YOSHINAGA MASAYUKI;IWASAKI TOSHIYA;OKADA MINORU;MASASHIRO TOSHIHIRO;YUASA TAKASHI;SHIGITANI ATSUHITO
分类号 H04J11/00;(IPC1-7):H04J11/00 主分类号 H04J11/00
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