| 摘要 |
PROBLEM TO BE SOLVED: To provide a multilayer wiring structure, capable of an increase of a degree of planarity on a surface after CMP, even in an area where a conductive pattern cannot be disposed. SOLUTION: A first area (10), an annular second region (11) surrounding the first area and a third region (12) surrounding the second region are zoned on a surface of a support substrate (20). A first wiring layer (M8L) is disposed on a support substrate. A wiring is formed in the third region of the first wiring layer, a dummy pattern is formed in the second region, and the conductive pattern is not formed in the first region. A functional element (1) is disposed on the first wiring layer and inside the first region. COPYRIGHT: (C)2006,JPO&NCIPI |
