发明名称 PULSE LOGIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a pulse logic circuit capable of using a pulse train for an information transmission medium and dealing a pulse itself as a control signal. SOLUTION: In the pulse logic circuit for receiving the pulse train configured such that one of two voltage levels is made a logical level 1 and the other is made a logical level 0, when a pulse is present at a desired time or a desired time interval, the logical value 1 is given to the time or the time interval, and when no pulse is present, the logical value 0 is assigned, a logic AND with a suppression input terminal attached thereto for suppressing an output when the logical value is 1 comprises a P type MOS transistor 10 and an N type MOS transistor 11, and an output (pulse train b) of NOT arithmetic operation for inverting the logical value 0 in the absence of the pulse and providing the logical value 1 indicating the presence of the pulse is given only to the suppression terminal attached logic AND. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005286676(A) 申请公布日期 2005.10.13
申请号 JP20040097459 申请日期 2004.03.30
申请人 JAPAN SCIENCE & TECHNOLOGY AGENCY 发明人 SEKINE MASATOSHI
分类号 H03K19/20;(IPC1-7):H03K19/20 主分类号 H03K19/20
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