发明名称 |
Method of layout of dynamic RAM (DRAM) memory chips etc., with generating automatically transfer data train with information about set-up and/or functions of data lines or current paths by place and route system |
摘要 |
<p>Method for layout design of DRAM memory chips etc. generates automatically transfer data train (10) with information about geometric set-up and/or function of data or current supply tracks by place and route system (1). Transfer data train is automatically transmitted to post-processing system (2) and/or recalled from data (3) bank by post-processing system. Post-processing in system is automatically carried out in dependence on data contained in transfer data train.</p> |
申请公布号 |
DE102004016223(A1) |
申请公布日期 |
2005.10.13 |
申请号 |
DE20041016223 |
申请日期 |
2004.03.26 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
SELZ, MANFRED |
分类号 |
G06F17/50;H01L21/768;H01L21/8242;(IPC1-7):H01L21/768;H01L21/824 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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