| 发明名称 |
Integrated circuit and method |
| 摘要 |
A via etch to contact a capacitor with ferroelectric between electrodes together with dielectric on an insulating diffusion barrier includes two-step etch with F-based dielectric etch and Cl- and F-based barrier etch.
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| 申请公布号 |
US2005227378(A1) |
申请公布日期 |
2005.10.13 |
| 申请号 |
US20050145663 |
申请日期 |
2005.06.06 |
| 申请人 |
MOISE THEODORE S;XING GUOQIANG;VISOKAY MARK;GAYNOR JUSTIN F;GILBERT STEPHEN R;CELII FRANCIS;SUMMERFELT SCOTT R;COLOMBO LUIGI |
发明人 |
MOISE THEODORE S.;XING GUOQIANG;VISOKAY MARK;GAYNOR JUSTIN F.;GILBERT STEPHEN R.;CELII FRANCIS;SUMMERFELT SCOTT R.;COLOMBO LUIGI |
| 分类号 |
H01L21/02;H01L21/311;H01L21/768;H01L21/8242;H01L21/8246;H01L27/108;H01L27/115;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/02 |
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