| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a phase locked loop in which a phase drift of an output signal of a lock loop is reduced. <P>SOLUTION: The phase locked loop (1) is provided with a frequency divider circuit (14) having a frequency division ratio (N), which can be set, in a feedback path. The frequency division ratio (N) is generated via a control circuit (15). The phase locked loop (1) is also provided with an input part (151), which is for inputting a phase correction signal (PK), other than the input parts (153, 155) for inputting components (I, F) of an integer or a fractional number for the frequency division ratio (N) to be set, and a phase correction device (16) for generating the phase correction signal (PK). It is preferable that the phase correction signal (PK) includes an exponentially changing signal component. The signal (PK) is input to the control circuit (15) to generate the frequency division ratio (N) for the frequency divider circuit (14). The phase drift of the output signal of a voltage control oscillator (13) in the phase locked loop (1) is compensated. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
