发明名称 PIPELINE TYPE INFORMATION PROCESSOR AND INFORMATION PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a pipeline type information processor and information processing method that cause no latency at a loop-back state. SOLUTION: The pipeline type information processor reads in advance instruction packets from an instruction memory 200 to an instruction queue 106 to provide multitasking. A processor 100 has a loop instruction queue 1071 for storing a leading instruction packet of a loop of loop processing, and a loop queue flag 1072 indicating whether or not the loop instruction queue 1071 is valid. When the loop processing is looped back, if the loop queue flag 1072 indicates that the loop instruction queue 1071 is valid, the instruction packet is read from the loop instruction queue 1071 to the instruction queue 106. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005284814(A) 申请公布日期 2005.10.13
申请号 JP20040099111 申请日期 2004.03.30
申请人 NEC ELECTRONICS CORP 发明人 KATO TAKUMI
分类号 G06F9/38;G06F9/32;G06F15/00;(IPC1-7):G06F9/38 主分类号 G06F9/38
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