| 摘要 |
A semiconductor integrated circuit capable of accurately measuring a time lag difference in operation test wiring is disclosed. It is provided with nMOS transistors in which each control terminal is connected to a signal terminal of a memory macro. Since the nMOS transistors are turned off when the test signals TCLK, TWE, and TRE are all at a low level, the potential of a pad which is connected to a drain is pulled up by a current generator. When the signal TCLK is changed to a high level, the transistor is turned on and the potential of the pad is changed to a low level. Then, a time lag from the moment at which the signal TCLK is changed to a high level to the moment at which the pad is changed to a low level is measured. Similarly, a time lag from the moment at which the signal TWE is changed to a high level to the moment at which the pad is changed to a low level and a time lag from the moment at which the signal TRE is changed to a high level to the moment at which the pad is changed to a low level are respectively measured. A difference of the measurement times corresponds to a difference of the time lags taken for the signals TCLK, TWE, and TRE to arrive at the memory macro.
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