发明名称 CHIP PACKAGE STRUCTURE AND CHIP PACKAGING PROCESS
摘要 A chip packaging process is provided. First, a cavity is formed on a heat sink. A first encapsulant is formed on the bottom of the cavity. A circuit substrate is disposed over the heat sink. The circuit substrate has an opening that corresponds in position to the cavity. Thereafter, a chip is disposed on the first encapsulant and the chip is electrically connected to the circuit substrate. Finally, a compound is deposited over the first encapsulant and the chip to form a chip package. The chip package is warp resistant and the chip packaging process increases overall production yield.
申请公布号 US2005224956(A1) 申请公布日期 2005.10.13
申请号 US20050907340 申请日期 2005.03.30
申请人 KAO CHIN-LI;LAI YI-SHAO;WU JENG-DA;WANG TONG-HONG 发明人 KAO CHIN-LI;LAI YI-SHAO;WU JENG-DA;WANG TONG-HONG
分类号 H01L23/10;H01L23/13;H01L23/28;H01L23/31;H01L23/36;(IPC1-7):H01L23/10 主分类号 H01L23/10
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