发明名称 |
Time division multiplexed link connections between a switching matrix and a port in a network element |
摘要 |
<p>Disclosed is an input port to one or more switching matrices of a network element or the like through a number of backpanel connections, the port receiving input flows in the form of bits arranged in frames, the port comprising: a memory for storing a number of bytes belonging to a tributary; a slicer for slicing the stored bytes in a number of word structures and a backpanel framer for forming backpanel frames with said word structures, the number of said word structures being equal to the number of said switching matrices and the capacity of the input flow being equal to the capacity of the overall backpanel connection capacity. <IMAGE></p> |
申请公布号 |
EP1585358(A1) |
申请公布日期 |
2005.10.12 |
申请号 |
EP20040290904 |
申请日期 |
2004.04.05 |
申请人 |
ALCATEL |
发明人 |
CABRINI, SERGIO;CUCCHI, SILVIO;GASTALDELLO, STEFANO;RAZZETTI, LUCA;GLADIALI, GIULIO |
分类号 |
H04J3/02;H04J3/16;H04L12/28;H05K7/14;H04L12/56;H04Q11/00;H04Q11/04;(IPC1-7):H04Q11/04 |
主分类号 |
H04J3/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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