发明名称 |
An integrated circuit with boundary scan test circuitry |
摘要 |
An integrated circuit comprising test circuitry, the test circuitry comprising a counter for counting clock signals and having an output for providing a control signal. The counter being arranged to have an internal state, and the counter being arranged to change the control signal on the internal state of counter reaching a predetermined value. <IMAGE>
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申请公布号 |
EP1584939(A1) |
申请公布日期 |
2005.10.12 |
申请号 |
EP20040252078 |
申请日期 |
2004.04.07 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
WARREN, ROBERT;MILLS, ROBERT M. |
分类号 |
G01R31/28;G01R31/3185;G01R31/319;G06F1/04;(IPC1-7):G01R31/318 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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