发明名称 |
Low power data storage element with enhanced noise margin |
摘要 |
A data storage element for use in LSSD compliant circuit designs. The data storage element has an alternate, or scan, data input circuit that has increased immunity to electrical noise while maintaining lower power consumption than the circuits used for primary data input. This increased noise immunity reduces the probably that noise on the alternate data input will cause an unintended change of data state stored in the data storage element. Modification of latch circuits used in the data storage element allow a reduction in the number of transistors used in the latch circuits, thereby compensating for the increase in transistors used in the alternate data input circuit and allowing the data storage element to use the same number of transistors as prior designs that have less noise immunity on their alternate data inputs.
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申请公布号 |
US6954086(B2) |
申请公布日期 |
2005.10.11 |
申请号 |
US20030665653 |
申请日期 |
2003.09.18 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHEN DAVID JIA;NOSOWICZ EUGENE JAMES |
分类号 |
G01R15/00;G11C11/412;H03K19/096;(IPC1-7):H03K19/096 |
主分类号 |
G01R15/00 |
代理机构 |
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代理人 |
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地址 |
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