| 摘要 |
In a fast synchronously controlled computer system, data signals are called from various memory banks, and this can result in propagation times of different lengths for the data signals, depending on the physical distance from the controller. Therefore, the data signals from a memory bank closer to the controller enter the controller earlier than in the case of a further removed one. To cure this problem, the controller sends an additional read signal that is also transmitted bi-directionally, first to the furthest removed data buffer of an associated memory bank and then to the closer data buffers of the corresponding memory banks. As a result, a sum of signal propagation times of the read signal from the controller to the respective memory bank and that of the read data from the memory bank to the controller is always of the same length, irrespective of the position of the memory bank.
|
