发明名称 |
Boosted potential generation circuit and control method |
摘要 |
A boosted potential generation circuit enables a high-speed operation and even miniaturization in a semiconductor memory even if external power supply voltage is reduced in the semiconductor memory. In the boosted potential generation circuit provided with a capacitor MOS transistor and a transfer MOS transistor and used for a DRAM including memory cells, a gate insulating film of the capacitor MOS transistor is thinner than that of the MOS transistor constituting the memory cell to realize a boosted potential generation circuit which has a small area and a large capacity. In this case, preferably, the gate insulating film of the transfer MOS transistor has a thickness which is not greater than that of the gate insulating film of the capacitor MOS transistor. |
申请公布号 |
US6954386(B2) |
申请公布日期 |
2005.10.11 |
申请号 |
US20030372000 |
申请日期 |
2003.02.20 |
申请人 |
HITACHI, LTD. |
发明人 |
NARUI SEIJI;MAE KENJI;MORINO MAKOTO;KUBOUCHI SHUICHI |
分类号 |
G11C11/407;G11C5/14;G11C11/4074;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108;H02M3/07;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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