发明名称 Data transfer circuit
摘要 A transmission unit loads transmission data on a first register and outputs it to a transfer line and starts counting the transmission clock signals in a strobe generation counter according to a transmission clock signal. When the counted value reaches a set value, a strobe signal is output. A reception unit loads the transfer data onto a second register according to a reception clock signal. An edge detection unit generates a valid signal with a pulse width corresponding to one cycle of the reception clock signal when the strobe signal is detected. A third register loads the data that is output from the second register, and outputs it as reception data according to the reception clock signal when the valid signal is supplied.
申请公布号 US2005220196(A1) 申请公布日期 2005.10.06
申请号 US20040999957 申请日期 2004.12.01
申请人 OKADA ATSUHIKO 发明人 OKADA ATSUHIKO
分类号 G06F13/42;G06F13/16;H04B1/38;H04L7/04;(IPC1-7):H04B1/38 主分类号 G06F13/42
代理机构 代理人
主权项
地址