发明名称 MEMORY CONTROL APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To stably operate a memory by controlling the memory using an optimal driving current. <P>SOLUTION: A memory control apparatus is provided with a clock control section 100 for changing a value of driving current of a clock in accordance with a value of select data D1 outputted from a CPU 3, and a CPU 200 for writing data into a main storage device 2 for each driving current, determining whether or not written data can be read out, and deciding an optimal driving current based on the determination. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005276114(A) 申请公布日期 2005.10.06
申请号 JP20040092270 申请日期 2004.03.26
申请人 KYOCERA MITA CORP 发明人 KUSUMI TADAHARU
分类号 G06F12/00;G06F1/04;(IPC1-7):G06F12/00 主分类号 G06F12/00
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