发明名称 SEMICONDUCTOR DESIGN SUPPORT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor design support device capable of easily fitting a clock skew between composite circuits comprising a selector selecting a particular clock from a plurality of clocks, and a circuit operated by the selected clock within tolerance. SOLUTION: In an EWS 10 supporting design of an LSI including a plurality of composite circuits comprising the two input selector selecting one clock from two clocks, and a synchronous D flip-flop operating in synchronization with the clock selected by the two input selector, the composite circuit is considered as one cell, and its attribute information is precedently stored in a library 16a of an HDD 16. When designing an LSI including composite circuits, the composite circuits are arranged on the basis of the attribute information stored in the HDD 16. It is judged whether or not a clock skew between the arranged composite circuits is within tolerance, and different messages are outputted in response to judgement results. By considering the composite circuit as one cell, and precedently storing its attribute information in the cell library, the clock skew between the composite circuits can be easily fit within the tolerance. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005275645(A) 申请公布日期 2005.10.06
申请号 JP20040086023 申请日期 2004.03.24
申请人 SANYO ELECTRIC CO LTD 发明人 TAINAKA KOJI
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F17/50 主分类号 G06F17/50
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