发明名称 Static floating point arithmetic unit for embedded digital signals processing and control method thereof
摘要 A floating point arithmetic unit for embedded digital signal processing is provided with the ability of tracking the exponent portion of numerals using static analyzing technology efficiently and of low-power consumption. A fix adding unit with a simplified mantissa alignment device and simplified normalizing device arranged at the input end and output end, a fix multiplying unit with a simplified normalizing device arranged at the output end, and a shifter are included in the floating point arithmetic unit. A shift control method in accordance the floating point arithmetic unit is also provided to prevent overflow of the peak of the numerals. According the unit and the method, the effective precision of the arithmetic result is higher. The hardware configuration, power consumption and chip area are similar with fix point arithmetic units, while the precision is close to the floating point arithmetic units with complicated configuration.
申请公布号 US2005223053(A1) 申请公布日期 2005.10.06
申请号 US20040928150 申请日期 2004.08.30
申请人 LIN TAY-JYI;LIN HUNG-YUEH;JEN CHEIN-WEI;LIU CHIH-WEI;LIAO I-TAO 发明人 LIN TAY-JYI;LIN HUNG-YUEH;JEN CHEIN-WEI;LIU CHIH-WEI;LIAO I-TAO
分类号 G06F5/01;G06F7/38;G06F7/485;G06F7/487;G06F7/499;G06F7/57;(IPC1-7):G06F7/38 主分类号 G06F5/01
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