发明名称 JITTER SUPPRESSOR, METHOD AND COMPUTER PROGRAM
摘要 PROBLEM TO BE SOLVED: To generate a system time clock in which a jitter is reduced. SOLUTION: A jitter suppressor reduces the jitter of time information included in an input digital signal. The jitter suppressor includes a time duration information extraction means for extracting an hour entry from an input digital signal; a time duration information storage means for storing the hour entry extracted by the time duration information extraction means; a data storage means for storing an input digital signal; a clock generating means; a clock measuring means for measuring the clock from the clock generating means; a data generating means for multiplexing the input digital signal; a multiplexing means for multiplexing the input digital signal stored in the data storage means and data generated by the data generating means; a time information correction means for correcting the time information included in the multiplexed data multiplexed by the multiplexing means; and a control means for controlling the time information storage means, the data storage means, the multiplexing means, and the time duration information correction means. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005277816(A) 申请公布日期 2005.10.06
申请号 JP20040088485 申请日期 2004.03.25
申请人 CANON INC 发明人 KARASAWA KATSUMI
分类号 H03K5/00;(IPC1-7):H03K5/00 主分类号 H03K5/00
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