| 摘要 |
PROBLEM TO BE SOLVED: To provide a processing apparatus having a plurality of reconfigurable units. SOLUTION: The processor 10 includes a plurality of reconfigurable units 100a and 100b having a reconfigurable circuit 12. The processor 10 is equipped with a connection, where the output of a reconfigurable circuit 12a is supplied to the input of a reconfigurable circuit 12b. The connection includes a FIFO 102 and temporarily stores the output from the reconfigurable circuit 12a. The reconfigurable unit 100b can read the data stored in the FIFO 102 with desired timing. COPYRIGHT: (C)2006,JPO&NCIPI
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