| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory control adapter that can suppress an increase in access latency. SOLUTION: At the start of uploading direct memory access, a CPU sets a read pointer register for designing from which location of a buffer memory 14 data should be taken. The read pointer register, which is set in a register group 16 via an I/F conversion/analysis part 22 from a PCI bus, is stored also in a buffer control part 24 by the I/F conversion/analysis part 22. According to the read pointer register, data are read ahead from the buffer memory 14 to a read buffer 26. As the CPU later sets a control register in the register group, the read buffer 26 passes the data to an interface controller 12. COPYRIGHT: (C)2006,JPO&NCIPI
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