发明名称 Semiconductor device and manufacturing method for the same
摘要 A lower interconnection is provided on a semiconductor substrate. A MIM capacitive element is provided on a first interlayer insulation film in which the lower interconnection is buried, and includes a lower electrode, an upper electrode, and a dielectric film sandwiched therebetween. An upper interconnection is provided on a second interlayer insulation film in which the MIM capacitive element is buried. A contact electrically connects the lower electrode and the upper interconnection. The lower electrode is mainly formed of Al, so that they are lower in electrical resistance than barrier metal, and also low in stress value. Therefore, it becomes possible to widen the area of the lower electrode for electrically connecting the contact while restraining their influences on charge accumulation and close contact between the lower electrode and the insulation film. In addition, since the electrical resistance is lowered, the thickness of the lower electrode can be increased. Accordingly, the MIM capacitive element with a large capacitance can be manufactured with a high yield.
申请公布号 US2005218520(A1) 申请公布日期 2005.10.06
申请号 US20050090112 申请日期 2005.03.28
申请人 NEC ELECTRONICS CORPORATION 发明人 KIKUTA KUNIKO;NAKAYAMA MAKOTO
分类号 H01L27/04;H01L21/02;H01L21/822;H01L23/522;H01L27/01;H01L27/108;(IPC1-7):H01L27/108 主分类号 H01L27/04
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