发明名称 |
Steuerungsverfahren und -vorrichtung |
摘要 |
Complex control procedures using direct memory access by a first DMA processing unit (54) sending control data to a first control unit by means of DMA channels (54-1 to 54-n), and a second DMA processing unit (56) sending control data to a second controller (36) by means of DMA channels (56-1 to 56-m). The first DMA processing unit (54) also has a branching controller (52) as a DMA channel for transferring timing data to a second timer (40). When a time specified by the received timing data passes, the second timer (40) sends an activation signal to DMA channel (56)-1 of the second DMA processing unit (56), and the DMA channels (56-1 to 56-m) are thereafter sequentially activated. <IMAGE> |
申请公布号 |
DE60301427(D1) |
申请公布日期 |
2005.10.06 |
申请号 |
DE2003601427 |
申请日期 |
2003.04.10 |
申请人 |
SEIKO EPSON CORP., TOKIO/TOKYO |
发明人 |
KAWASE, YUJI |
分类号 |
B41J2/01;B41J19/18;G06F3/12;G06F13/28;(IPC1-7):G05B19/40 |
主分类号 |
B41J2/01 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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