| 摘要 |
PROBLEM TO BE SOLVED: To provide a technology capable of reducing an electrostatic capacity between adjacent floating gates and reducing a change in threshold value caused by an interference between adjacent memory cells in a micro-fabricated nonvolatile semiconductor device of a 90 nm generation or later. SOLUTION: The shape of a floating gate 3 of the memory cell is formed to protrude, and a part intervening a control gate 4 of the floating gate 3 and a second insulation film 8 is formed to be smaller in size than the lower part of the gate 3. Thus, while an area between the floating gate 3 and the control gate 4 is sufficiently kept, a facing area between the floating gates 3 under adjacent word lines WL is reduced, and while a capacity coupling ratio between the gates 3 and 4 is kept, the facing area between the adjacent floating gates 3 is reduced, thereby reducing an influence of a change in threshold value. COPYRIGHT: (C)2006,JPO&NCIPI
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