| 摘要 |
The invention relates to a pin-sharing system which comprises an integrated circuit, a first device, a second device, a memory device, a first set of wiring lines, a second set of wiring lines, and a third set of wiring lines. The integrated circuit comprises a first pin group and a second pin group. The first device comprises a first set of data pins. The second device comprises a set of I/O pins. The memory device comprises a first set of address pins, a second set of address pins, and a set of memory data pins. The first set of wiring lines connects the first set of data pins, the first set of address pins, and the first pin group. The second set of wiring lines connects the set of memory data pins, the set of I/O pins, and the second pin group, wherein the second set of wiring lines comprises a buffer connected between the set of I/O data/address pins and the second pin group, and the buffer temporarily stores a set of address signals, sending the set of address signals to the second device upon receiving an address-latch instruction. The third set of wiring lines connects the second set of address pins, the buffer, and the second pin group.
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