发明名称 |
Method and apparatus to generate a reference value in a memory array |
摘要 |
An apparatus and method for generating a reference in a memory circuit are disclosed. At least two dummy bit-cells are used to generate a reference voltage. One cell has high value stored and the other has a low value stored. The cells are activated and discharged into respective bit-lines. The bit-lines are equalized during the discharge process to generate a reference that is approximately a mid point between a high value cell and a low value cell.
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申请公布号 |
US6952376(B2) |
申请公布日期 |
2005.10.04 |
申请号 |
US20030740551 |
申请日期 |
2003.12.22 |
申请人 |
INTEL CORPORATION |
发明人 |
SOMASEKHAR DINESH;YE YIBIN;KHELLAH MUHAMMAD M.;PAILLET FABRICE;TANG STEPHEN H.;KESHAVARZI ALI;LU SHIH-LIEN;DE VIVEK K. |
分类号 |
G11C7/14;G11C7/18;G11C11/4097;G11C11/4099;(IPC1-7):G11C7/02 |
主分类号 |
G11C7/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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