| 发明名称 |
Method and apparatus for inspecting a semiconductor device |
| 摘要 |
A method and apparatus for inspecting a semiconductor device in which failure occurence conditions on a whole wafer are estimated by calculating the statistic of potential contrasts in pattern sections from sampled images to implement higher throughput, and defective conditions of a process are detected at an early stage with the help of time series data of the estimate result.
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| 申请公布号 |
US6952492(B2) |
申请公布日期 |
2005.10.04 |
| 申请号 |
US20010942213 |
申请日期 |
2001.08.30 |
| 申请人 |
HITACHI, LTD. |
发明人 |
TANAKA MAKI;WATANABE MASAHIRO;WATANABE KENJI;NOZOE MARI;MIYAI HIROSHI |
| 分类号 |
G01R31/302;G01N23/225;G01Q20/04;G01Q30/04;H01L21/027;H01L21/66;(IPC1-7):G06K9/00 |
主分类号 |
G01R31/302 |
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