| 摘要 |
An interrupt number setting circuit consisting of a register and a decoder is arranged for each interrupt factor (macro) and an arbitrary interrupt number is set in the register. For example, when an interrupt arises in an interrupt factor (201a), an interrupt number 15 set in the register (202a-1) is read out to the decoder (202a-2) and an interrupt signal is output from one of the bus lines corresponding to the number. The aforementioned signal is distributed to one of the interrupt controllers, here to a controller (204a), by OR circuits (203a to 203g) in a controller decision circuit (203). The controller (204a) executes interrupt processing of the interrupt number 15. Thus, it is possible to control various types of interrupt required by a user while suppressing the circuit size.
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