| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a debug system for reducing time delay by replacing a software break point. <P>SOLUTION: A host computer 30 issues a command to an ICE 20 and when the ICE 20 confirms that there is a command of addition/deletion of a software break point, it controls so that an order corresponding to a memory 13 should be replaced by a software break point. After this, a user uses the host computer 30 to make an issue request of user program execution. When the issue request is an execution request from the software break point, the ICE 20 reads a command originally existing at an execution start position to be a target according to an original group of commands stored in the host computer 30, and sets it to a re-execution start command set register 14. A CPU core 12 reads the command from the re-execution start command set register 14, operates a command bus switch circuit 15 after completion, and sequentially reads the command from the memory 13 from the next institution onwards, and executes them. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
