| 摘要 |
PROBLEM TO BE SOLVED: To provide a digital signal processing system capable of reducing spurious radiation at data transfer, without causing data excess and deficiency coused by clock frequency differences among circuit blocks whose clock frequencies differ from each other. SOLUTION: The digital signal processing system is provided with a reference clock generator 14A for generating a fixed frequency clock S1; an A/D converter 11 operating at the fixed frequency clock S1 generated by the reference clock generator 14A; a frequency spread clock generator 14B for generating a frequency spread clock S2; a signal processing block 13 operating at the frequency spread clock S2 generated by the frequency spread clock generator 14B; and a buffer memory 12 that is connected to the A/D converter 11 and the signal processing block 13, applies data write/read processing to the A/D converter 11, on the basis of the fixed frequency clock S1, and applies data write/read processing to the signal processing block 13 on the basis of the frequency spread clock S2. COPYRIGHT: (C)2005,JPO&NCIPI
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