发明名称 |
Decryption circuit, encryption circuit, logic cell, and method of performing a dual-rail logic operation in single-rail logic environment |
摘要 |
A decryption circuit for generating a decrypted data signal and a complementary decrypted data signal from a key. In addition, a means for performing a linkage specification so as to generate the logic signal and the complementary logic signal from the decrypted data signal and the complementary decrypted data signal in accordance with the linkage specification. In addition, an encryption means for generating an encrypted logic signal from the key and from the logic signal.
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申请公布号 |
US2005213757(A1) |
申请公布日期 |
2005.09.29 |
申请号 |
US20050067309 |
申请日期 |
2005.02.25 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
KUNEMUND THOMAS |
分类号 |
G06F5/00;G06K19/073;H03K19/003;H04L9/00;H04L9/06;H04L9/28;(IPC1-7):H04L9/00 |
主分类号 |
G06F5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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