摘要 |
<p>Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.</p> |
申请人 |
NANOSYS, INC.;DUAN, XIANGFENG;CHOW, CALVIN, Y., H.;HEALD, DAVID, L.;NIU, CHUNMING;PARCE, J., WALLACE;STUMBO, DAVID, P. |
发明人 |
DUAN, XIANGFENG;CHOW, CALVIN, Y., H.;HEALD, DAVID, L.;NIU, CHUNMING;PARCE, J., WALLACE;STUMBO, DAVID, P. |