发明名称 TEST CIRCUIT AND TESTING METHOD OF SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a test circuit of a semiconductor memory which makes the delivery test of a target device using a few input/output terminals by mounting a serial interface such as JTAG on the semiconductor memory. SOLUTION: The memory circuit of the semiconductor memory performs delivery test items of a wafer other than an input/output pin leakage test using a few input/output terminals (a power supply terminal, GND (grounding) terminal and other five pins) by mounting the serial interface (14) on the semiconductor memory (10). The memory circuit of the semiconductor memory is used as a method to make the delivery test. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005268583(A) 申请公布日期 2005.09.29
申请号 JP20040079927 申请日期 2004.03.19
申请人 NEC CORP 发明人 YAMAZAKI KAZUYUKI
分类号 G01R31/28;G11C29/12;H01L21/822;H01L27/04;(IPC1-7):H01L21/822 主分类号 G01R31/28
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