| 摘要 |
Improving charged device model (CDM) electrostatic discharge (ESD) testing failure rate is disclosed by applying a capacitive coating to an integrated circuit (IC). The IC includes a primary substrate, a number of contacts, and the coating. The substrate has a top surface, a bottom surface, and side surfaces. The contacts are on the top surface, and are connectable to packaging element pins. The capacitive coating is on at least the bottom surface, to make contact with a lead frame intended to secure the substrate to the packaging element. The coating provides a capacitance electrically in series with the capacitance of the IC. The total capacitance during CDM testing is decreased, decreasing the RC constant governing discharge of charge placed on the IC. Discharge occurs more slowly, the discharge current being inversely related to the constant. The maximum discharge current is decreased, allowing the IC to better withstand CDM testing.
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