| 摘要 |
PROBLEM TO BE SOLVED: To realize a data holding circuit in which robustness against soft error is enhanced furthermore. SOLUTION: The data holding circuit comprises a data holding section 1 for holding input data D, a first correction circuit for holding the input data in a first correction data holding node PDH and correcting the data held in a data holding node DH, a second correction circuit for holding the input data in a second correction data holding node NDH and correcting the data held in the data holding node DH, a second N channel transistor N2 connected between the first correction data holding node PDH and a low potential power supply, a second P channel transistor P2 connected between the second correction data holding node NDH and a high potential power supply, a down correction control circuit for activating the second N channel transistor N2 when data held in the data holding node DH has a high level, and an up correction control circuit for activating the second P channel transistor P2 when data held in the data holding node DH has a low level. COPYRIGHT: (C)2005,JPO&NCIPI
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