Flash memory array

摘要

A flash memory array has silicon lines (WL0-WL7), made of doped silicon, connected to rows of memory cells. A silicon line is connected to the memory cells in the same row. Metal strapping lines M2 are arranged each parallel to a silicon line; and spaced apart connectors are associated with each silicon line for electrically connecting a silicon line to its associated metal strapping line. Each of the spaced apart connectors of a silicon line (WL0) is not arranged in the same column as the spaced apart connectors of an adjacent silicon line (WL1), but is arranged in the same column as the spaced apart connectors of a silicon line (WL2) adjacent to the said adjacent silicon line (WL1).