| 摘要 |
A semiconductor memory device includes a sense amplifier, a pair of bit lines connected to the sense amplifier, first and second memory cell arrays connected to the bit lines, respectively, and including a plurality of memory cells each having a cell transistor and a ferroelectric capacitor, and first and second select transistors connected to the bit lines between the sense amplifier and the first and second memory cell arrays. The device further includes a first equalizing circuit connected to the bit lines closer to the first and second memory cell arrays than the first and second select transistors.
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