| 摘要 |
After a read operation is conducted to a memory area designated by an address in response to a combination of a data destructive signal and a chip select signal, a bit line is pre-charged with a ground potential and an electric potential of a plate line is lowered, thereby stopping the data from being written back to an area in which the data is destroyed by the read operation. The electric potential of the word line may be kept at VDD level without boosting it to a potential for writing back the data. The bit line may be clamped to the ground potential, thereby stopping the read data from being output to an outside of a memory device to stop an operation of a sense amplifier.
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