发明名称 |
Hardware unit for controlling access to e.g. memory, has latch generating and delivering electric validation signal of access request signal to logic combination unit, when access authorization code and preset reference value are equal |
摘要 |
The unit has a register (21) for obtaining an access authorization code (Code-AA) to allow access to a peripheral (P). A hardwired logic (22) compares the code with a preset reference value (Code-UMCA) calculated by a generation unit (24). A latch (23) generates and delivers an electric validation signal (SIGVAL) of an access request signal (CS-RQ) to a logic combination unit (25), when the code and the reference value are equal. Independent claims are also included for the following: (A) a processor having an access control hardware unit (B) a method of controlling an access to a peripheral (C) a computer program having an instruction to perform a method of controlling an access to the peripheral (D) utilization of an access control hardware unit for validating an access signal to a peripheral.
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申请公布号 |
FR2867871(A1) |
申请公布日期 |
2005.09.23 |
申请号 |
FR20040002842 |
申请日期 |
2004.03.19 |
申请人 |
SECURE MACHINES SA |
发明人 |
BRESSY PHILIPPE;PERROTEY GILLES |
分类号 |
G06F12/14;G06F13/10;G06F21/57;G06F21/78;G06F21/82;(IPC1-7):G06F13/10 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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