| 摘要 |
A semiconductor memory device is provided which includes sub-arrays and a spare sub-array, in which memory cells are arranged in row and columns. The spare sub-array replaces a sub-array including a faulty memory cell. First local bit lines are connected to the memory cells of each sub-array. A second local bit line is connected to the memory cells of the spare sub-array. A global bit line is shared by the first local bit lines and the second local bit line. Transfer gates set connections of each of the local bit lines to the global bit line. Sub-array decoders are provided in correspondence with the respective sub-arrays, and select the sub-arrays. A switch circuit changes correlation between the sub-arrays and the spare sub-array and the sub-array decoders. A fuse element, in which the correlation in the switch circuit is stored, outputs a signal indicating the correlation to the switch circuit.
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