| 摘要 |
Microelectronic devices including a layer of germanium and selenium, optionally including up to 10 atomic percent silver, show promise for select applications. Manufacturing microelectronic devices containing such layers using conventional CMP processes presents some significant challenges. Embodiments of the invention provide methods of planarizing workpieces with Ge-Se layers, many of which can be carried out using conventional CMP equipment. Other embodiments of the invention provide chemical-mechanical polishing systems adapted to produce planarized workpieces with Ge-Se layers or, in at least one embodiment, other alternative layers. Various approaches suggested herein facilitate production of such microelectronic devices by appropriate control of the down force of the Ge-Se layer against the planarizing medium and/or one or more aspects of the planarizing medium, which aspects include pH, abrasive particle size, abrasive particle hardness, weight percent of abrasive.
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